A Review of an Efficient 8-bit Vedic Multiplier using Reversible Logic - *, Abhilasha; K M, Mr. Sudharshan (IJRDO - Journal of Electrical And Electronics Engineering, 2015)
This paper basically emphasizes on different methodologies that have been proposed from past few years on multiplier. Research on multiplier and reversible logic has widely covered applications such as design of ALU, RISC, CISC, Design of low power arithmetic and data path for digital signal processing (DSP), Low power CMOS, Optical computing, Quantum computing, Nanotechnology and many more .These applications led to untiring efforts for further techniques yet to be proposed. This paper enlightens us about numerous techniques that have extensively being used for Vedic multiplier based Nikhil am sutra using reversible logic.